Invited talk: Barcelona...

HPC Architecture and Application Research Center and IEEE Croatia Section Computer Chapter invite you to lectures:

 "Barcelona Supercomputing Center"
 "From Classical to Runtime Aware Architectures and Beyond"
 "European strategic HPC initiatives"

which will be held by Mateo Valero, the Barcelona Supercomputing Center and Fabrizio Gagliardi, Polytechnic University of Catalonia, on Monday, June 3, 2019, at 10:00 am in Grey Hall, Faculty of Electrical Engineering and Computing, University of Zagreb, Unska 3.

The scheduled duration of the lectures is 90 minutes and the language of the lecture is English. The lecture is open to all those interested, and especially we invite students.

A summary of the lectures and the resume of the lecturers is provided in the detailed news content.

Summary of the lectures:
 "Barcelona Supercomputing Center"
The BSC-CNS, Barcelona Supercomputing Center-National Supercomputing Center was established in 2005 and houses the MareNostrum, one of the most powerful supercomputers in the world. We are the pioneer center of supercomputing in Spain. Our specialty is high performance computing - also known as HPC or High Performance Computing - and our mission is twofold: to offer infrastructure and supercomputing services to Spanish and European scientists, and to generate knowledge and technology to transfer them to society. We are Severo Ochoa Center of Excellence, which recognizes us as one of the best in Spain, members of the first level of the European research infrastructure PRACE (Partnership for Advanced Computing in Europe), and we manage the Spanish Supercomputing Network (RES). As a research center, we have more than 600 experts, with more than 40% from 48 countries, organized into four major areas of research: Computer Science, Life Sciences, Earth Sciences and Computer Applications in Science and Engineering.

We have a close collaboration relationship with the industry and especially with leading companies in the information technology sector and users of supercomputing. This relationship has been reflected, among other agreements, in the creation of joint research centers with companies such as IBM, INTEL, Microsoft, Nvidia, and Repsol. The center has been very active in the EC Framework Programs and has participated in more than 150 projects funded by Brussels. In this colloquium I will explain some of the research projects we developed with the aforementioned companies, others within the European context and others of an internal nature to the BSC. I will also explain the three major challenges we are facing today, such as the use of supercomputers for Artificial Intelligence, for Personalized Medicine and finally the development of the European supercomputer.

 "From Classical to Runtime Aware Architectures and Beyond"
When uni-cores were the norm, Instruction Level Parallelism (ILP) and Data Level Parallelism (DLP) were exploited to increase the number of instructions executed per cycle. The main hardware approaches exploiting ILP were Very Long Instruction Word (VLIW) processors, which require to statically determine dependencies between instructions, and Superscalar designs, which dynamically detect and execute multiple independent instructions in parallel by using several execution units. Computer architects started to combine superscalar processors with pipelined, out-of-order and speculative execution to mitigate the increasingly large memory latencies. In this context, simple Instruction Set Architectures (ISA) allowed to decouple the hardware design from the software.

More recently, the traditional ways to increase hardware performance to the rate predicted by the Moore's Law vanished. The integration of symmetric multiprocessors on a single chip has compensated the frequency stagnation problem. However, such kind of multi-core architectures do not decouple the hardware design from the software stack in the same easy way as uniprocessors did. They face multiple problems in terms of power consumption, programmability or memory latency. The solution is to give more responsibility to the parallel runtime system and to let it tightly collaborate with the hardware. The runtime has to drive the design of multi-core architectures. 

In this talk, we introduce an approach towards a Runtime-Aware Architecture (RAA), a massively parallel architecture designed from the runtime's perspective. RAA aims at supporting the activity of the parallel runtime system in three ways: First, to enable fine-grain tasking; second, to improve the performance of the memory subsystem by exposing hybrid hierarchies to the runtime; and, third, by using vector units. During the talk, we will give an overview of the problems RAA aims to solve and provide some examples of hardware components supporting the activity of the parallel runtime system. 
This talk also describes several ways to improve the RAA concept even more. They consist in exploiting the dynamic information available at the hardware level by using artificial intelligence approaches. 

 "European strategic HPC initiatives"
The talk will cover overview of EU wide initiatives for high perfomance computing including data and distributed infrastructure.

 

Resume of the lecturers:


Dr. Mateo Valero is a professor at Technical University of Catalonia, UPC, and the Director of the Barcelona Supercomputing Center. His research focuses on high performance architectures. He has published over 700 papers, has served in the organization of more than 300 international conferences and he has given more than 500 invited talks.
Dr. Valero has been honoured with several awards. Among them, the Eckert-Mauchly Award 2007 by the IEEE and ACM; Seymour Cray Award 2015 by IEEE; Charles Babbage 2017 by IEEE; Harry Goode Award 2009 by IEEE: ACM Distinguished Service Award 2012; Euro-Par Achievement Award 2015; the Spanish National Julio Rey Pastor award, in recognition of research in Mathematics; the Spanish National Award “Leonardo Torres Quevedo” that recognizes research in engineering;  the “King Jaime I” in basic research given by Generalitat Valenciana; the  Research Award by the Catalan Foundation for Research and Innovation and the “Aragón Award” 2008  given by the Government of Aragón. "Hall of the Fame" member of the ICT European Program (selected as one of the 25 most influents European researchers in IT during the period 1983-2008. Lyon,November 2008); Honoured with Creu de Sant Jordi 2016 by Generalitat de Catalunya. It is the highest recognition granted by the Government. Honoured with “Condecoración de la Orden Mexicana del Águila Azteca” 2018, highest recognition granted by the Mexican Government
He is Honorary Doctorate by 9 Universities. He is a fellow of IEEE and ACM and is and Intel Distinguished Research Fellow. He is member of 8 academies.

Dr. Fabrizio Gagliardi spent the first 30 years of his career (1975-2005) at the European Centre for Particle Physics, in Geneva, Switzerland, and 8 years (2005-2013) at Microsoft and Microsoft Research in the US, Switzerland and in the UK. 
He is now Distinguished Research Director at the Polytechnic University of Catalonia, Spain. In this position, he advises the Barcelona Supercomputing Centre leadership on their long-term international strategy. He also leads BSC participation in a major EU supported projects (RDA-EU 4) and plays a major role in the EuroHPC initiative to develop a European high performance supercomputer to list in the top 3 supercomputers in the world by 2023. 
He also leads the organisation of the 2019 ACM HPC summer school in Barcelona, as part of his role in the ACM Europe Policy board.
Formerly he was visiting professor, at the Gran Sasso Scientific Institute, L’Aquila, Italy and Independent computing consultant, in Geneva, Switzerland.
In his long career, Fabrizio held senior scientific and managerial positions in prestigious scientific research organisations (CERN in CH, Stanford Accelerator in the US) and consulted with scientific organisations such as Fermi National Laboratory and NSF in the US, INFN in Italy, STFC in the UK…).
His research interests focus on exploring new advanced computing technologies, which could better support science: AI, real-time data acquisition systems, data management system design, distributed systems, grid and cloud technology, High Performance Computing and computer architecture. 
He is considered a pioneer of Grid and Cloud computing in Europe. In fact he conceived and led for several years in the early 2000’s the first major Grid projects for science (EUdataGrid and EGEE 1 - 2) while he was at CERN, and he inspired a number of related grid projects (EUChinaGrid, EUBalticGrid, EUIndiaGrid, EUMedGrid, EUSEEGrid, IberiaGRID, EELA…). Once in Microsoft, he proposed and led the first major Cloud project for science EU-VENUS (2010-12).
He has been awarded a number of prizes, most notably the ACM President Award in 2013 and again in 2018.


Links:

Dr. Mateo Valero http://www.bsc.es/cv-mateo/

Dr. Fabrizio Gagliardi http://www.bsc.es/gagliardi-fabrizio

HPC Architecture and Application Research Center http://hpc.fer.hr

IEEE Croatia Section Computer Chapter  http://www.ieee.hr/ieeesection/odjeli_chapteri/c16

Author: Daniel Hofman
News list