The Faculty of Electrical Engineering and Computing (FER), has launched the research and development project FERICA (FER Initiative for Chips and Architectures), focused on the design and implementation of the first Croatian microprocessor based on the open RISC-V architecture - FRISCV.
The objective of the project is to develop several iterations of a Croatian RISC-V processor and to manufacture them in European semiconductor foundries. After fabrication, the developed chips will undergo thorough testing and verification, covering the entire processor development lifecycle – from the initial concept and architectural design, through the design of individual components, to fabrication and evaluation of the complete system together with its peripherals.
FERICA has a strong educational component. Through the project, new generations of FER students will be educated in processor and chip design, while the acquired knowledge will be transferred to industry through collaboration with industrial partners. The use of an open approach will enable the involvement of a broader community beyond the faculty, fostering collaborative processor development and education on the complete chip design and manufacturing process.
The project also includes the development of infrastructure for chip testing and verification, the creation of educational materials, optimization of artificial intelligence algorithms for RISC-V platforms, and active contributions to the open-source RISC-V community. FERICA directly supports the objectives of the EU Chips Act and EuroHPC initiatives, creating the foundations for stronger involvement of Croatia in future European projects related to processor design, digital sovereignty, and high-performance computing.
The project brings together FER researchers led by the Center for High-Performance Computing Architectures and Applications, with experience in European initiatives such as DARE, EPI, EUPEX, and EUPILOT, and represents an important step toward the development of a national RISC-V ecosystem in synergy with European strategic technological priorities. The planned results include several iterations of the FRISCV chip manufactured in European foundries, accompanying software packages, and educational resources, ensuring long-term sustainability through academic and industrial collaboration.
All interested parties who wish to participate in the development and tapeout of the first Croatian RISC-V processor are invited to contact daniel.hofman@fer.hr.
