The European High Performance Computing Joint Undertaking (EuroHPC JU) has launched 3 new research and innovation projects. The projects aim to bring the EU and its partners closer to developing independent microprocessor and HPC technology. The European Processor Initiative (EPI SGA2), The European PILOT and the European Pilot for Exascale (EUPEX) are interlinked projects and an important milestone towards a more autonomous European supply chain for digital technologies.

HPC Architecture and Application Research Center participates as a partner in all three projects. Experts from the research Centre are working on various tasks such as the development and verification of a new general-purpose processor based on Arm architecture, the development of FPU (Floating-Point Unit) for accelerators based on RISC-V instruction set architecture and the development of applications in the field of artificial intelligence and image and video processing that tests system architectures and their performance.

European Processor Initiative is a project based on an industrial approach to research. The main goals of the project are to deliver central components of future European supercomputers to boost innovation and the digital transformation of the European economy.

EUPEX aims to directly support the European entrepreneurial ecosystem around European HPC technology, addressing related sectors such as Artificial Intelligence (AI) and Big Data.

The European PILOT is a project that is working on designing an accelerator based on European technology and an open standard using the RISC-V instruction set architecture.

"We are proud to be part of all three leading European consortia aiming to produce key computing components essential to Europe's digital sovereignty and economic and research competitiveness. The creation of European processor and accelerators for future EU exascale systems is one of the most advanced areas of research in computing, and it is of great importance that FER participates in this research", said prof. Mario Kova─Ź, PhD, Director of the HPC Architecture and Application Research Center and Head of the research activities.

Author: Nikolina Lednicki
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