EPAC1.0 RISC-V Test Chip samples were delivered to EPI and initial tests of their operation were successful. One of the partners that are working on this project is the HPC Architecture and Application Research Center (Faculty of Electrical Engineering and Computing).
Mario Kovač, Director of the HPC Architecture and Application Research Center and Chief Communications Officer of the European Processor Initiative, held a presentation at the 27th International European Conference on Parallel and Distributed Computing, held online on September 3, 2021.
Mario Kovač, Director of the HPC Architecture and Application Research Center and Chief Communications Officer of the European Processor Initiative, held a presentation at the CPS&IoT’2021 Summer School in Budva (Montenegro), held on June 7-10, 2021.
HPC Architecture and Application Research Center of the Faculty of Electrical Engineering and Computing at the University of Zagreb is looking for professionals/researchers with expertise in RTL Design and Verification for ASIC and FPGA designs to join us in the following projects:
One of the best known Croatian Radiotelevision shows about science, Prometej, hosted the HPC Architecture and Application Research Center's team, namely, the vice-presidents - prof. Josip Knezović and Daniel Hofman, who discussed the Center's work and projects.
Faculty of Electrical Engineering and Computing at the University of Zagreb has joined RISC-V International. RISC-V International is a global nonprofit association based in Switzerland, which was founded in 2015 as the RISC-V Foundation and is now a global organization with over 700 members in more than 50 countries. Its goal is to promote RISC-V as a free and open Instruction Set Architecture (ISA) enabling a new era of processor innovation through open standard collaboration.
Eaton , a leading provider of power management solutions, and the Faculty of Electrical Engineering and Computing (FER) at the University of Zagreb have today announced details of the IDEAS (Immersive Datacentre ExplorAtion and Supervision) project. Funded by the European Union, the project aims to work alongside a panel of Eaton’s partners and customers to uncover solutions to help small data centres, with one to ten racks, get more value from their IT infrastructure at a fraction of the cost and without the complexity of traditional solutions.
Director of HA2RC, prof. dr. sc. Mario Kovač, who is also the Chief Communications Officer of the European Processor Initiative (EPI), and both of the Centre’s vice-presidents, Josip Knezović and Daniel Hofman, attended the first digital version of Supercomputing and hosted the booth of the European Processor Initiative.
2020 Third International Symposium on Signal and Image Processing (ISSIP 2020) is aimed to foster the field of signal and image processing encompassing the theory and practice of algorithms and hardware that convert signals produced by artificial or natural means into a form useful for a specific purpose. The signals might be speech, audio, images, video, sensor data, telemetry, electrocardiograms, or seismic data among others. The possible application areas include transmission, display, storage, interpretation, classification, segmentation, or diagnosis.
Mario Kovač, Director of the HPC Architecture and Application Research Center and Chief Communications Officer of the European Processor Initiative, attended the locally hosted European Space Agency Earth Observation workshop, held on March 5-6, 2020.
The 20 th HiPEAC conference held in Bologna, Italy, from January 20 th to 22 nd hosted several workshops attended by the members of the European Processor Initiative. One of those, organized by HA2RC as members of EPI, was the tutorial called “ First steps towards a made-in-Europe high-performance microprocessor ”, covering the latest in EPI.
Director of HPC Architecture and Application Research Center, prof. dr. sc. Mario Kovač, who is also the Chief Communications Officer of the European Processor Initiative, attended the biggest and globally most recognized HPC conference – the Supercomputing conference, which took place in Denver, USA, from November 18 th to 21 st , 2019.
One of the largest projects the Center is participating in, the European Processor Initiative, was presented at the EFECS (European Forum for Electronic Components and Systems) from November 19-21, 2019 in Helsinki, Finland. EPI’s booth captains were Philippe Notton, General manager of EPI, and Daniel Hofman, Vice-president of the HPC Architecture and Application Center.
During the largest European HPC gathering, the ISC in Frankfurt, taking place from 16-20 June, 2019, Josip Knezović, Vice-president of the HPC Architecture and Application Research Center, captained the booth of the largest project the Center is participating in – the European Processor Initiative.
The Week of Open Source Hardware (WOSH) took place in Zurich, Switzerland, from June 11 to 14, 2019, as a part of the RISC-V workshop. The FoSSI Foundation and the Pulp team, with the support of Eurolab4HPC and OPRECOMP projects, organized a free complimentary program that covered various topics concerning free and open source silicon, its licensing and open source EDA tools.
